Digital Logic Design I

CPE100 Fall 2021


Description

Professor:
Dr. Brendan Morris,
SEB 3216
OH: TBA

Lecture: TuTh 13:00-14:15, Remote-Synchronous
Final: Tu Dec 7, 13:00-15:00
Look up your final exam schedule now to determine conflicts.

Please note that the exam is listed here as if in person however due to virtual nature of the class it is highly likely the exam will have some flexibility on the time you take it. However, you should block of this time in your calendar now.

Tutoring:
Engineering Tutoring Lab, TBE-A 207

The tutoring lab will be virtual for Fall20 (maybe for Fall21?). Times will be updated when they become available.

You are highly encouraged to take advantage of the tutoring services. 1) You are paying for them and 2) students find the services helpful since the tutors have recently finished the course and are quite knowledgeable.

Textbook

Digital Design and Computer Architecture, Harris and Harris, 2nd Edition, ISBN: 978-0123944245 [direct link] [library link] [1st Ed. link]

Be sure to either use the UNLV VPN or go through the UNLV library access using your ACE account.

Recommended Text

Fundamentals of Logic Design, Roth and Kinney, 7th Edition, ISBN: 978-1133628477

Catalog Description:

Logic gates. Simplification of Boolean functions. Design and testing of combinational and sequential circuits including code converters, multiplexers, adders, and synchronous counters.
Prerequisites: MATH 127 OR MATH 128 OR MATH 181 OR higher, OR SAT math score of 630 or higher OR ACT math score of 28 or higher. MATH 127 or MATH 128 must be completed with a grade of C or better.

Course Syllabus: [pdf]

Grading

ComponentPercentageDate
Homework: 25% Weekly
Participation: 10% "In Class"
Midterms: 40% 09/30, 11/11
Final: 25% 12/07

Gradebook

The gradebook is available through UNLV Webcampus [link].

Virtual Resources

This section will be updated with useful items during the course. Please email anything you think is useful for the class.

Announcements

DateNote
08/16/21 Welcome to Fall 2021. Seems this will look a lot like one year ago. CPE100-1003 will be a fully remote course. It will be run synchronously, so be sure to block off the originally scheduled "lecture" time on Tuesdays and Thursdays between 1:00-2:15 for interactive discussion/office hours. We will try our best to be flexible and understanding as things will certainly evolve over the semester.

Schedule (Tentative)

Course content will be posted in the Schedule below. Lecture (Panopto) and Discussion (Webex) can be found on Webcampus.

WeekDateLecture Topic/RecordingReadingAssignment
1 08/24 Tu class01: Intro [pdf]
Digital Design Principles [vid][WebEx]
[Ch1 slides]
Ch1.1-1.3
Ch1.4
HW01 [pdf]
Solutions [pdf]
Due Su 09/05
08/26 Th class02: Number Systems [vid1-representations][vid2-addition][WebEx]
2 08/31 Tu class03: Logic Gates + Truth Tables [vid][WebEx] Ch1.5-1.6
A.1-A.2, A.6
HW02 [pdf]
Solutions [pdf]
Due Su 09/12
09/02 Th class04: Logic Levels [vid][WebEx]
3 09/07 Tu class05: Transistors [vid1] + Power [vid2][WebEx] Ch1.7-1.9
Ch 2.1-2.3.2
HW03 [pdf][comp0][v2]
Solutions [pdf]
Due Su 09/19
09/09 Th class06: Boolean Intro [vid1] + Equations [vid2][WebEx]
4 09/14 Tu class07: Boolean Algebra [vid1-axioms/theorems][vid2-multivar theorems][WebEx] [Ch2 slides]
Ch 2.3.3-2.3.5
HW04 [pdf]
Solutions [pdf]
Due Su 09/26
09/16 Th class08: Boolean Simplification [vid][WebEx]
5 09/21 Tu class09: Two-Level Logic [vid][WebEx] Ch 2.4-2.6
09/23 Th class10: Bubble Pushing [WebEx]
6 09/28 Tu class11: Midterm Review [WebEx]
09/30 Th class12: Midterm01 [WebEx]
7 10/05 Tu class13: Karnaugh Maps [vid][WebEx] Ch 2.7 HW05 [pdf]
Solutions [pdf]
Due Su 10/17
10/07 Th class14: K-Maps [KMap problems][WebEx]
8 10/12 Tu class15: K-Maps [KMap problems solutions][WebEx] Ch 2.8 HW06 [pdf][comp1]
Solutions [pdf]
Due Su 10/24
10/14 Th class16: Multiplexers, Decoders [vid][WebEx]
9 10/19 Tu class17: Timing: Delay and Hazards [vid][WebEx] Ch 2.9-2.10
Ch 3.1-3.2
HW07 [pdf][comp2]
Solutions [pdf]
Due Su 10/31
10/21 Th class18: Sequential Logic: Latches and Flip-Flops [vid][WebEx]
10 10/26 Tu class19: Registers [WebEx] [Ch3 slides]
Ch 3.4
10/28 Th class20: Finite State Machines [vid][WebEx]
11 11/02 Tu class21: FSM [WebEx] Ch 3.4 HW08 [pdf]
Solutions [pdf]
Due Su 11/07
11/04 Th class22: FSM Examples [WebEx]
12 11/09 Tu class23: Midterm Review [WebEx] Ch 3.5.1-3.5.2
11/11 Th class24: Veterans Day - Midterm02 => Fri/Sat
13 11/16 Tu class25: Timing Sequential Circuits [vid][WebEx] Ch 3.6 HW09 [pdf][comp3]
Solutions [pdf]
Due We 11/24
11/18 Th class26: Parallelism [vid][WebEx]
14 11/23 Tu class27: Adder Design [WebEx] [Ch 5 pdf]
Ch 5.1-5.2.3, 5.4
HW10 [pdf][v2]
Solutions [pdf]
Due Su 12/05
11/25 Th class28: Thanksgiving
15 11/30 Tu class29: Building Blocks [vid][WebEx] Ch 1-3, 5
12/02 Th class30: Final Review [WebEx]
16 12/07 Tu Final
-
12/09 Th -